There has been a trend in the semiconductor industry toward reducing device size and increasing the packaging density of wafers. Many factors contribute to the fabrication processing in an attempt to maximize efficiency and throughput in the fabrication of semiconductors. Like other aspects of integrated circuit processing, the technology for fabricating contact holes has evolved to keep pace with other advances in the process sequence.
Contacts in a semiconductor integrated circuit allow electrical connection between metal conductors and circuit elements in the semiconductor integrated circuit substrate. With rapid increase of the number of layers in a semiconductor device, contact holes are formed to connect upper and lower wiring layers to each other. As the degree of integration of semiconductor devices increases, the size and space available for forming the contact holes correspondingly decreases. Similarly, the pitch (distance between adjacent contact holes) among semiconductor components also decreases. Thus, critical dimensions (e.g., size, diameter, circumference, etc.) of components, including contact holes, have to be shrunk to fabricate more transistors on one single wafer. A thermal flow process is one methodology to shrink contact holes. This process first uses traditional lithography to form a patterned photoresist layer on a substrate whereafter a thermal flow is additionally performed to shrink the contact holes' dimensions on the patterned photoresist layer. However, the shrinking range of the isolated contact hole is usually greater than the dense contact hole. Consequently, after the thermal flow process, critical dimensions of components in a dense area compared to an isolated area may not be uniform.